Please use this identifier to cite or link to this item: http://nuir.lib.nu.ac.th/dspace/handle/123456789/6304
Title: Investigation of Current Harmonic Mitigation Techniques for Three-Phase Grid-Connected Inverter Under Voltage Distortion
การศึกษาวิธีการบรรเทากระแสฮาร์โมนิกสำหรับอินเวอร์เตอร์สามเฟสที่เชื่อมต่อกริดภายใต้สภาวะแรงดันผิดเพี้ยน
Authors: Suparak Srita
ศุภลักษณ์ ศรีตา
Sakda Somkun
ศักดา สมกุล
Naresuan University
Sakda Somkun
ศักดา สมกุล
sakdaso@nu.ac.th
sakdaso@nu.ac.th
Keywords: Multi-resonant controllers (MR); Multiple synchronous reference frame (MSR) controllers; Harmonic compensators (HCs); Voltage-source converter (VSC); Hardware-in-the-loop (HiL); LCL-filter; discrete-time control; harmonics; grid-connected inverter; modeling; voltage source converter
Issue Date:  23
Publisher: Naresuan University
Abstract: This study presents a novel approach to harmonic compensation in three-phase grid-connected voltage source converters (VSCs), addressing challenges presented by grid voltage distortion and frequency variations. It introduces an advanced simulation method within the MATLAB/Simulink environment that accurately replicates the functionality of discrete-time controlled grid-connected VSCs. This method employs switched-circuit modeling for simulating the power stage in the continuous-time domain, seamlessly integrating with the physical unit scale. The control algorithm, formulated in a MATLAB function on a per-unit scale, is efficiently convertible into C language for deployment on a 32-bit C2000 DSP controller, ensuring uniformity in the parameters of the regulators. Extensive testing of this methodology utilized both a hardware-in-the-loop real-time simulator and a 5-kVA three-phase LCL-filtered grid-connected VSC. This included the application of a discrete-time control scheme within the synchronous reference frame. The study explores the effectiveness of Proportional-Integral plus Multi-Resonant (PIMR) controllers in mitigating high-order harmonic currents by employing harmonic compensators at the 6th and 12th harmonic orders. This strategy focuses on minimizing grid voltage harmonic orders 5th, 7th, 11th, and 13th, achieving a total harmonic distortion (THD) of 4.69%. Implemented on a TMS320F28379D digital signal processor, the PIMR controller demonstrated enhanced performance over the traditional Multiple Synchronous Reference Frame (PIMSR) controller. It achieved significant harmonic rejection in the grid current, with a THD nearing 1% aligning with the IEEE 1547 standard and realizing a 35% reduction in computational time.
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URI: http://nuir.lib.nu.ac.th/dspace/handle/123456789/6304
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